Virtual Memory, Page Tables, and the TLB

The numerical value of a pointer printed by a program does not necessarily identify a location directly in RAM. Modern OSes normally translate the virtual addresses visible to a process into physical addresses using mappings managed by hardware and the OS. This supports both flexible memory use and isolation between processes.

What you will learn

You will calculate address translations by separating the page number from the offset within a page. You will distinguish a missing TLB entry from an absent page or a protection violation, and explain why a page fault does not necessarily imply a crash or a disk read.

Dividing a virtual address range into pages

A page table records mappings from virtual pages to physical page frames and their access permissions. With 4 KiB pages, the low 12 bits of an address give the offset within a page, while the remaining bits give the virtual page number. Available page sizes and the number of page-table levels depend on the architecture and configuration.

Page size = 4096 = 0x1000 bytes
Virtual address = 0x12345
Virtual page number = 0x12, page offset = 0x345
Suppose the mapped physical frame number is 0xAB
Physical address = 0xAB000 + 0x345 = 0xAB345

Translation preserves the offset within the page. A virtual page can be assigned to a different physical frame without changing the address used by the program. Conversely, two processes using the same virtual address can reach different data if their mappings differ. Shared memory deliberately maps the same physical pages into more than one address space.

The TLB caches address translations

The TLB is a small cache of frequently used address translations. A matching entry avoids the work of walking the page table on every access. On a TLB miss, the translation is obtained by mechanisms such as a page-table walk. The details depend on the CPU.

A TLB miss does not imply that the page containing the data is absent from RAM. Not having a cached translation is different from being unable to access the mapped page. The data cache is also separate: it stores the actual data being read or written. Fast address translation does not guarantee fast data retrieval.

Page faults can be part of normal operation

If a needed page has not been allocated, has been moved to disk, or cannot be accessed with the requested permissions, the CPU reports a page-fault exception. The OS checks whether the access is legitimate and may allocate a page or read data before restarting the instruction. An invalid access can lead to a signal such as SIGSEGV on Linux.

Reserving a large region does not require allocating physical memory for every page immediately. Allocating pages on first access avoids paying for unused parts. Such a page fault may require no disk I/O. A rise in the number of faults alone does not identify either the cause or the delay.

Copy-on-write shares pages until a write is needed

Copy-on-write initially lets processes share the same physical page for reading and creates an independent copy when one process writes. This can reduce the cost of duplicating a parent's entire memory immediately after fork. The OS handles the write fault so that each process observes independent memory.

Describing virtual memory only as using an SSD when RAM is full overlooks protection, sharing, and lazy allocation. Virtual memory also works in systems with no swap. When investigating performance, examine the number of pages accessed, TLB behavior, physical-memory pressure, and actual I/O separately.

Check your understanding

Question 1: With 4 KiB pages, virtual address 0x23456 maps to physical frame 0xCD. What is the physical address? The page offset is 0x456, so the answer is 0xCD456. Do not carry the virtual page number 0x23 into the physical address.

Question 2: TLB misses increased. Must SSD reads have increased as well? No. If only the translation-cache entry is missing, the mapping can be obtained from page tables in RAM. Disk I/O requires a separate observation.

Caches and the Memory Hierarchy provides the other half of the picture: consider address-translation costs separately from the cost of obtaining data.